Analog Layout Engineer – 4+ Years Experience
We are looking for an experienced Analog Layout Engineer with 4+ years of industry experience in custom IC layout. The ideal candidate should have strong expertise in analog/mixed-signal layout, physical verification, and advanced semiconductor process technologies.
Key Responsibilities
Develop high-quality analog and mixed-signal layouts for blocks such as amplifiers, ADC/DAC, PLLs, bandgaps, references, LDOs, and other custom circuits.
Perform placement, routing, matching, shielding, common-centroid, and guard-ring techniques.
Handle full-custom layout from schematic to final GDS.
Run and debug DRC, LVS, ERC, PEX and resolve physical verification issues.
Work closely with circuit designers, verification, and physical design teams to achieve performance, area, and reliability targets.
Support post-layout simulation and identify layout-related performance issues.
Ensure compliance with foundry PDKs and technology design rules.
Required Skills
4+ years of experience in analog/custom IC layout.
Hands-on experience with Cadence Virtuoso and physical verification tools.
Experience in FinFET and/or planar/non-FinFET technologies.
Strong understanding of analog layout techniques, device matching, parasitics, and ESD/latch-up concepts.
Good debugging and problem-solving skills.
Experience in advanced nodes is an added advantage.
