Responsibilities and Duties include, but not limited to:
- Chipping in to the development of new NAND Flash Memory by assisting with the overall design, layout, and optimization of Memory/Logic circuits
- Supervise and own the full chip verification activities including planning, tracking, and criteria setting
- Drive the multi-functional team in key features evaluation and recommend architectural decisions
- Driving innovation into the future Memory generation with dynamic work environment
- Proven ability to leverage AIassisted (vibe) coding techniques to improve efficiency or automate design and analysis methodologies
- Leverage AI tools to automate the tools and workflow
- Applying Artificial Intelligence in workflows to improve build efficiency
Successful candidates for this position will have:
- Broad knowledge and experience in IP Verification is preferred
- Ability to lead a multi-functional team in a project environment
- Good interpersonal skills with the ability to convey complex technical concepts verbally and in writing
- Proven knowledge of various verification functionalities at the full chip level
- Proven expertise and background in Test Bench development using SystemVerilog
- Knowledge of verification methodologies such as UVM
- Knowledge of circuit simulators such as XA, hspice and/or hsim/Finesim, etc.
- 6-8 years of proven experience in Verification
- Degree or equivalent experience/Major: BS, MS or Ph.D in Electrical Engineering (or related fields)
