leadIC Design Pvt Ltd
Website:
leadicdesign.com
Company:
https://www.linkedin.com/company/leadicdesign
Seniority: Entry level
Industries: Semiconductors
Job details:
Company Description LeadIC Design Pvt Ltd is a full-stack VLSI engineering company focused on accelerating semiconductor innovation for global product teams. Founded in 2018, the company supports the entire chip development lifecycle, offering deep technical expertise and strong execution ownership. With engineering teams across India and Canada, LeadIC delivers custom, memory, and analog layout services alongside digital design, verification, physical design, and characterization. LeadIC emphasizes quality-driven execution, scalable offshore development centers, and an engineering culture built on ownership and accountability, making it a trusted partner for leading semiconductor companies. The organization forms long-term technical partnerships that help customers achieve faster and more reliable silicon success.
Role Description This is a full-time, on-site Analog Layout role based in Bengaluru South, requiring 4 to 10 years of relevant experience. The role involves designing and implementing analog and custom layout blocks using industry-standard EDA tools, ensuring compliance with foundry design rules and layout best practices. The individual will collaborate closely with circuit designers to translate schematics into robust physical layouts, perform layout versus schematic (LVS) and design rule check (DRC) closure, and optimize layouts for performance, area, and manufacturability. The role includes ownership of layout documentation, participation in design reviews, and coordination with cross-functional teams to support tape-out schedules and quality targets. The position requires proactive problem-solving, clear communication, and adherence to project milestones in a fast-paced, product-focused environment.
Qualifications
- Candidates should possess strong skills in Layout Design, particularly for analog and mixed-signal circuits, with hands-on experience in advanced process nodes.
- Candidates should possess skills in Page Layout and Graphics for producing clear, well-structured design documentation and visual representations of layouts.
- Candidates should possess basic awareness of Graphic Design principles to support the creation of technical diagrams, schematics, and presentation materials.
- Candidates should possess familiarity with Digital Marketing concepts to effectively communicate technical capabilities and project outcomes within internal and external stakeholder presentations.
- Proficiency with industry-standard EDA tools (such as Cadence Virtuoso or similar), and solid understanding of DRC, LVS, EM/IR, and parasitic extraction flows.
- Bachelor’s or Master’s degree in Electronics, Electrical Engineering, VLSI, or a related field, with 4 to 10 years of relevant analog layout experience.
- Strong analytical and problem-solving skills, attention to detail, and the ability to work independently as well as in collaborative teams.
- Good written and verbal communication skills and a willingness to take ownership of deliverables and timelines.
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