KriSemi Design Technologies Pvt Ltd
Website:
krisemidesigntech.com
Job details:
📍 Location: Bengaluru
💼 Experience: 10+ Years
Key Responsibilities:
🔹 Lead the design and optimization of high-performance, low-power standard cells for advanced process nodes with a strong focus on PPA (Power, Performance & Area).
🔹 Design sequential and combinational standard cells and arithmetic building blocks at the transistor level.
🔹 Develop schematics using Cadence Virtuoso.
🔹 Perform post-layout validation, PVT and Monte Carlo verification, and reliability sign-off.
🔹 Apply low-power design methodologies and collaborate with Layout, Characterization, STA, CAD, and Product Engineering teams to deliver silicon-ready libraries.
🔹 Drive design methodology improvements and mentor engineering teams.
Required Skills:
✅ Standard Cell Circuit Design
✅ Cadence Virtuoso
✅ PPA Optimization
✅ Transistor-Level Design
✅ Sequential & Combinational Cell Design
✅ Arithmetic Cell Design
✅ Post-Layout Validation
✅ PVT & Monte Carlo Verification
✅ Reliability Sign-off
✅ Low-Power Design Techniques
Click on Apply to know more.
