Website:
bigendiansemi.com
Job details:
Company Description BigEndian Semiconductors is a fabless semiconductor startup building secure, high-performance System-on-Chips (SoCs) in India for global markets, focused on surveillance, telecom, IoT, and enterprise applications. Founded by an experienced team with a history of world-first innovations, the company emphasizes a “security by design” approach that tightly integrates hardware and software. With core strengths in VLSI, system architecture, and embedded software, BigEndian develops trusted silicon solutions serving both national security and commercial needs. Headquartered in Bengaluru and supported by strategic partnerships in Taiwan and India, as well as deep-tech investors and government programs, BigEndian is building an end-to-end ecosystem for semiconductor innovation. The company’s mission is to help establish India as a global hub for semiconductor design, innovation, and manufacturing, starting with fabless design and expanding toward fabrication capabilities.
Role Description The Senior VLSI Design/Verification Engineer will be responsible for leading RTL design and verification for complex SoCs, collaborating closely with architecture, firmware, and physical design teams. Day-to-day activities include translating system and microarchitecture specifications into high-quality RTL, performing design optimization, running simulations, and driving debug and closure of functional and performance issues. The role involves working with EDA tools for synthesis, static timing analysis, and linting, reviewing design constraints, and supporting integration, DFT, and validation teams through tapeout and silicon bring-up. The engineer will also contribute to design methodologies, documentation, and best practices that support secure, reliable silicon platforms. This is a full-time, on-site role based in Bengaluru, requiring regular cross-functional collaboration within the company’s engineering teams.
Qualifications
- Strong foundation in Design Engineering, including RTL design (Verilog/SystemVerilog), microarchitecture, and digital logic design.
- Experience with EDA tool flows such as synthesis, STA, lint, CDC, and formal verification.
- Exposure to Product Design in semiconductor or embedded systems, including requirements analysis, trade-off decisions, and design-for-test/design-for-security considerations.
- Hands-on experience with SoC design, bus architectures (e.g., AXI), memory subsystems, and IP integration.
- Experience in verification (SystemVerilog/UVM), scripting (Python, Perl, or TCL), and automation of design flows.
- Minimum 6 Year Experience
- Master’s or Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related discipline.
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