AVIVYS
Website:
avivys.com
Job details:
Job Description – Senior Principal Engineer (T4)
job location - gurugram
Function: Engineering Sub Function: Wireless Networking and Government Projects Type of Employment: Permanent Project Overview: SDR (Software Defined Radio) Development
Roles & Responsibilities- FPGA System Design: Design and implement FPGA-based systems for applications such as digital signal processing, high-speed communication, and image processing.
- System Integration: Collaborate with hardware and software engineers to integrate FPGA designs into larger systems.
- Verification Strategies: Develop and implement FPGA verification methodologies, including simulation and hardware testing.
- Optimization: Optimize FPGA designs for performance, power consumption, and cost efficiency.
- Cross-functional Collaboration: Work with diverse teams to ensure project goals are achieved on time and within budget.
- Technology Adoption: Stay current with emerging FPGA technologies and incorporate them into design processes.
Requirements- Education: Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, or related field.
- Experience: 5+ years in FPGA design, verification, and implementation.
- Languages: Proficiency in Verilog and/or VHDL.
- Tools: Familiarity with FPGA development tools (Xilinx Vivado, Vitis).
- Verification Tools: Experience with FPGA verification tools and methodologies (ModelSim, UVM).
- Problem Solving: Strong analytical and teamwork abilities.
- Communication: Excellent communication and collaboration skills.
- Domain Knowledge: Familiarity with DSP, high-speed communication protocols, and image processing.
- Debug Tools: Knowledge of Chipscope and Logic Analyser.
Preferred Qualifications- High-speed Interfaces: Experience with PCIe, Ethernet, or DDR.
- Embedded Systems: Familiarity with embedded systems and microcontrollers.
- Programming: Knowledge of C/C++ or Python for software development.
- Prototyping: Experience with FPGA-based prototyping and emulation.
- Algorithms: Knowledge of DSP and/or machine learning algorithms.
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