Mixed Signal Design Verification Engineer
Allegro MicroSystems
- Experience
- 1+ yrs
- Location
- Manchester, New Hampshire, United States
- Job type
- Full-time
Required skills
- Cadence AMS Designer
- Virtuoso
- Verilog
- SystemVerilog
- Verilog-AMS
- GitLab
- Jama Connect
- Python
- Bash
- Skill
About the role
Bachelor's or Master's in Electrical/Computer Engineering; 1-3 years mixed-signal verification or IC design experience; Cadence EDA tools; Verilog/SystemVerilog; analog circuit knowledge; Linux and scripting; GitLab and Jama Connect exposure.
About Allegro MicroSystems
Public semiconductor designer and fabless manufacturer of sensor and application-specific power ICs for automotive and industrial customers.
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