- Salary
- $160k - $230k
- Experience
- 5+ yrs
- Location
- United States
- Job type
- Full-time
Required skills
- SystemVerilog
- UVM
- Python
- Synopsys VCS
- Mentor Questa
- Cadence Xcelium
- Synopsys TestMax
- Siemens Tessent
- git
About the role
Bachelor's or Master's in Electrical/Computer Engineering; 5+ years digital design verification with 2+ in DFT; UVM, SystemVerilog, Python, EDA tools (VCS, Questa, Xcelium, TestMax, Tessent); experience with PCIe/Ethernet PHY verification.
About DELOS
AI interconnect company building server hardware and software for hyperscalers, AI infrastructure builders, and enterprises scaling inference.
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