Principal Physical Design Engineer
Astera Labs
- Experience
- 8+ yrs
- Location
- Ahmedabad, Gujarat, India
- Job type
- Full-time
Required skills
- Cadence
- Synopsys
- System Verilog
- Verilog
- Python
- Perl
- DFT tools
About the role
Bachelor's in EE/Computer required, Master's preferred; 8+ years developing complex SoC/silicon for server/storage/networking; hands-on synthesis, place and route, CTS, STA, physical verification; Cadence/Synopsys tools; System Verilog/Verilog; DFT; Python/Perl scripting.
About Astera Labs
Provider of connectivity solutions for AI data centers.
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