SILCOSYS Solutions Pvt. Ltd.
Website:
silcosys.com
Job details:
Company Description SILCOSYS Solutions Pvt. Ltd. partners with global clients to develop next-generation flagship products across mobile devices, networking equipment, consumer electronics, storage solutions, microprocessors, and graphics processors. The company focuses on pioneering advanced and rare technologies that are critical to the semiconductor industry. SILCOSYS is recognized for its capability to design highly complex system-on-chips (SoCs). It is further distinguished by having one of the industry’s strongest analog/mixed-signal and software design teams, offering engineering professionals the opportunity to work on challenging, high-impact projects.
Role Description The Senior Analog Layout Engineer will be responsible for designing and implementing analog and mixed-signal layouts for complex integrated circuits, ensuring compliance with design rules, performance targets, and reliability requirements. Day-to-day activities include translating circuit schematics into optimized layouts, performing layout reviews, coordinating closely with circuit design engineers, and collaborating with verification teams to resolve design and DRC/LVS issues. The role also involves supporting physical verification, optimizing area and performance, maintaining documentation, and contributing to best practices and layout guidelines. This is a full-time, on-site role based in Bengaluru, requiring close interaction with cross-functional engineering teams.
Qualifications
- Strong proficiency in layout design for analog and mixed-signal integrated circuits, including experience with advanced process nodes and industry-standard EDA tools.
- Solid understanding of circuit design concepts, including analog and analog circuits, to effectively interpret schematics and optimize layouts for performance, noise, matching, and reliability.
- Hands-on experience with physical verification, including DRC, LVS, and related sign-off checks, and the ability to debug and resolve verification issues efficiently.
- Demonstrated experience in complex SoC or IP-level analog layout, such as amplifiers, data converters, PLLs, power management blocks, and high-speed interfaces.
- Bachelor’s or Master’s degree in Electronics Engineering, Electrical Engineering, or a related field, with several years of relevant industry experience in analog layout.
- Ability to collaborate effectively in cross-functional teams, communicate technical issues clearly, manage multiple tasks, and meet project deadlines.
- Familiarity with foundry design kits, process design rules, and layout methodologies for manufacturability, reliability, and yield optimization.
- Experience mentoring junior engineers and contributing to the development of layout standards and guidelines is an advantage.
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