Renesas Electronics
Website:
renesas.com
Company:
https://www.linkedin.com/company/renesas
Industries: Semiconductor Manufacturing
Job details:
Renesas is a global semiconductor leader shaping the backbone of next-generation automotive, industrial, cloud, and IoT innovation. With over $9.3 billion in annual revenue (2024) and a world-class team of 22,700+ employees, Renesas operates at scale while retaining the agility to drive category-defining breakthroughs. The company's footprint spans more than 30 countries, enabling deep customer proximity and a uniquely global innovation engine. As Japan's semiconductor powerhouse and a top global player in microcontrollers, analog, and power technologies, Renesas delivers real-world impact across EVs, smart factories, renewable energy infrastructure, and edge intelligence.
Renesas has a growing presence in India with headcount approaching 1000+ and significant engagement with government, universities, and the semiconductor manufacturing ecosystem. With the growing importance of India as both a market and talent hub, the India for India division's mission is to create products, including power and analog ICs, mixed-signal devices, software, and system solutions, that address local market needs. This is a unique opportunity to directly influence future products for a fast-growing Indian market with distinct applications, cost structures, and localization requirements.
Job Description
We are seeking a Senior Staff Digital Design Engineer to architect and implement the digital content within power, analog, and mixed-signal IC products. This is a senior individual-contributor role requiring ownership from requirements and microarchitecture through RTL, synthesis, timing closure, DFT support, and silicon bring-up.
The successful candidate will design control, sequencing, protection, diagnostics, trimming, communication, test, and safety-related logic that works closely with analog circuitry. The emphasis is not on large processor SoCs. It is on high-quality digital design embedded inside power and analog ICs.
You will be expected to resolve ambiguous requirements, make sound area-power-performance trade-offs, develop reusable design practices, mentor engineers, and collaborate across analog design, verification, physical design, test, applications, and product teams.
Responsibilities :
Digital Architecture & RTL Design
Design optimized RTL for control, sequencing, protection, diagnostics, trimming, communication, test, and low-power functions within power and analog ICs.
Own block-level integration and contribute to chip-level digital architecture, interfaces, clocking, reset, power-state, and register-map decisions.
Make and document trade-offs across functionality, area, power, testability, timing, reuse, and implementation risk.
Implementation, Timing & DFT
Develop synthesizable Verilog/SystemVerilog RTL, synthesis scripts, timing constraints, and implementation collateral.
Own or guide synthesis, lint, CDC/RDC, low-power checks, static timing analysis, and handoff to physical design.
Support DFT architecture and implementation, including scan insertion, ATPG enablement, test modes, and production-test requirements.
Verification & Silicon Support
Collaborate with verification engineers on verification planning, assertions, coverage, debug, and specification closure.
Support gate-level and post-layout verification, silicon bring-up, device evaluation, failure analysis, and root-cause investigation.
Technical Leadership & Reuse
Drive reusable RTL, design methodology, coding standards, review practices, and automation across projects.
Collaborate effectively with analog, applications, test, layout, CAD, and product teams across global locations.
Qualifications
Bachelor or Masters degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related discipline.
Deep hands-on experience in logic design, microarchitecture, Verilog/SystemVerilog RTL coding, synthesis, and static timing analysis.
Experience designing digital control logic embedded in PMICs, power-management, automotive, audio, or other mixed-signal integrated circuits.
Strong understanding of clocks, resets, low-power states, finite-state machines, register interfaces, fault handling, and hardware-software interaction.
Working knowledge of DFT, scan insertion, ATPG, test modes, CDC/RDC analysis, lint, and gate-level verification.
Experience with scripting and automation using TCL, Python, Perl, shell, or similar languages.
Proven ability to own complex design blocks, influence chip-level decisions, mentor engineers, and lead technical reviews.
Additional Information
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.
At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.
We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Are you ready to join our team and shape the future with us?
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.
Click on Apply to know more.
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