L&T Semiconductor Technologies
Website:
ltsct.com
Company:
https://www.linkedin.com/company/lt-semiconductor-technologies
Seniority: Not Applicable
Industries: Semiconductor Manufacturing
Job details:
Role
- Develop and optimize semiconductor process flows for SiC and GaN power devices in collaboration with external foundries.
- Support integration of key fabrication processes including epitaxy, ion implantation, oxidation, annealing, dielectric deposition, lithography, etching, metallization, and passivation.
- Plan and execute Design of Experiments (DOE) to optimize process performance and manufacturability.
- Analyze inline process data, electrical characterization, and wafer acceptance results to improve process capability.
- Investigate process-related issues and support root-cause analysis of process excursions.
- Collaborate with Device Design engineers to ensure successful implementation of new device structures.
- Support technology qualification and production release activities.
- Contribute to process documentation, specifications, and process control methodologies.
- Work closely with foundries, device design and reliability teams, and product engineering during technology development and product ramp-up.
Requirements
- MS/PhD in Electrical Engineering, Materials Science, Semiconductor Physics, or a related discipline.
- 4–8 years of experience in semiconductor process integration or process development.
- Good understanding of semiconductor fabrication processes and process integration.
- Experience with DOE planning, statistical data analysis, and process optimization.
- Experience in JMP, Minitab, or other statistical tools.
- Familiarity with semiconductor process monitoring and electrical characterization.
- Understanding of semiconductor defects, yield improvement, and process variation.
- Experience working with external wafer foundries is preferred.
- Knowledge of JEDEC and AEC-Q101 qualification standards is desirable.
- Strong analytical, problem-solving, and communication skills.
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