BigEndian Semiconductors
Website:
ambitsemi.com
Company:
https://www.linkedin.com/company/bigendiansemi
Industries: Semiconductor Manufacturing
Job details:
Company Description BigEndian Semiconductors is a fabless semiconductor startup building secure, high-performance System-on-Chips (SoCs) in India for global markets. The company focuses on silicon platforms that power next-generation surveillance, telecom, IoT, and enterprise systems, guided by a “security by design” philosophy that tightly integrates hardware and software. With deep expertise in VLSI, system architecture, and embedded software, BigEndian develops trusted solutions serving both national security and commercial needs. Headquartered in Bengaluru and supported by strategic partnerships in Taiwan and India, as well as experienced leadership from companies like Intel, ARM, Broadcom, and Zenoti, BigEndian is committed to driving India’s emergence as a global hub for semiconductor design and innovation.
Role Description The Senior Physical Design Engineer role is a full-time, on-site position based in Bengaluru. This role involves ownership of physical design implementation for complex SoCs, including floorplanning, placement, clock tree synthesis, routing, and timing closure. The engineer will perform static timing analysis, power and IR drop analysis, and collaborate closely with RTL, logic design, and verification teams to ensure robust and efficient designs. Day-to-day responsibilities include running physical verification (DRC/LVS), debugging layout and timing issues, optimizing for performance, power, and area, and preparing design data for tapeout. The role also includes contributing to methodology improvements, automation scripts, and best practices to enhance design quality and productivity.
Qualifications
- Strong Physical Design skills, including floorplanning, placement, CTS, routing, and timing closure.
- Experience with Physical Verification, including DRC, LVS, and sign-off checks using industry-standard EDA tools.
- Solid foundation in Logic Design and Circuit Design principles for high-performance, low-power digital circuits.
- Proficiency in RTL Design concepts, with the ability to interface effectively with front-end design teams.
- Hands-on experience with STA tools (e.g., PrimeTime), P&R tools (e.g., Innovus, ICC2), and scripting (e.g., Python, Tcl).
- Knowledge of advanced process nodes, power optimization techniques, and design-for-test (DFT) considerations.
- Minimum 5 year experience
- Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or a related field, with several years of relevant industry experience.
- Ability to work collaboratively in cross-functional teams, strong analytical and problem-solving skills, and clear technical communication.
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