Synthesis & STA Engineer

Job Title: Synthesis & STA Engineer

Location: India

Employment Type: Full-time

Experience Required: 3 - 7 years

Salary Range: ₹40 - ₹60 LPA (Confidential)

Company: Weekday

Job Description:

We are seeking a highly skilled Synthesis & STA Engineer to join our team. As part of our engineering team, you will work on digital synthesis and timing analysis for advanced chip designs. The role demands strong experience in digital design and timing closure using industry-standard tools and methodologies.

Key Responsibilities:

• Perform RTL synthesis and generate netlists for ASIC designs.
• Conduct Static Timing Analysis (STA) to ensure timing closure and performance optimization.
• Collaborate with the design, verification, and physical design teams to meet project requirements.
• Implement constraints and optimize designs for power, area, and timing.
• Identify and resolve timing violations using appropriate techniques.
• Support and mentor junior engineers in STA and synthesis workflows.

Required Skills:

• Synthesis: Hands-on experience with RTL synthesis and working with tools like Synopsys Design Compiler or Cadence Genus.
• Static Timing Analysis (STA): Proficiency in performing STA using tools like Synopsys PrimeTime or Cadence Tempus.
• Familiarity with timing constraints and optimization strategies.
• Strong knowledge of digital design concepts, clock tree synthesis (CTS), and power management.
• Experience in working with 45nm or lower technology nodes.

Qualifications:

• Bachelor’s or Master’s degree in Electronics, Electrical Engineering, or a related field.
• 3-7 years of experience in synthesis and STA for high-performance ASIC designs.
• Familiarity with low-power design techniques and methodologies.