Vtricks Technologies
Website:
vtricks.in
Job details:
Job Title: VLSI Physical Design Engineer
Experience: 3+ Years
Qualification: B.E./B.Tech/M.E./M.Tech in Electronics, ECE, VLSI or related discipline
Location: Ahmedabad, Pune, Chennai, Bangalore
Job Summary
We are looking for experienced VLSI Physical Design Engineers with hands-on expertise in end-to-end ASIC/SoC Physical Design implementation. The ideal candidate should have experience from floorplanning through sign-off and timing closure, ensuring high-performance, power-efficient, and manufacturable designs.
Key Responsibilities
- Perform Floorplanning, Power Planning, and Macro Placement.
- Execute Standard Cell Placement and Congestion Optimization.
- Perform Clock Tree Synthesis (CTS) and Clock Optimization.
- Carry out Global and Detailed Routing.
- Achieve Timing Closure by resolving setup/hold violations.
- Perform Physical Verification (DRC, LVS, ERC, Antenna checks).
- Execute Sign-off activities including IR Drop, EM analysis, and Parasitic Extraction.
- Implement Engineering Change Orders (ECOs) for design closure.
- Collaborate with RTL, DFT, STA, and Verification teams throughout the design cycle.
Required Skills
- Strong understanding of the complete Physical Design flow.
- Hands-on experience with:
- Floorplanning
- Placement
- CTS
- Routing
- Timing Closure
- Physical Verification
- Sign-off
- Good understanding of CMOS fundamentals, timing concepts, RC parasitics, and signal integrity.
- Proficiency in TCL scripting and Linux/Unix commands.
Mandatory Tools
- Cadence Innovus
- Synopsys ICC2
- PrimeTime
- Calibre
- Aligo (Mandatory)
- Alt TM (Mandatory)
Preferred Skills
- Low Power Design
- Multi-Voltage Domain implementation
- Experience in advanced technology nodes (7nm/5nm and below)
Click on Apply to know more.