Website:
sasi.ac.in
Job details:
Company Description Sasi Institute of Technology & Engineering is a higher education institution located in Kadakatla, near the aerodrome in Tadepalligudem, Andhra Pradesh, India. The institute focuses on providing quality technical and engineering education to prepare learners for industry and research careers. Situated in a growing educational hub, it offers access to modern infrastructure and collaborative learning environments. Sasi Institute of Technology & Engineering is committed to fostering innovation, practical skills, and professional development for students and staff. The campus location provides a blend of academic focus and community engagement opportunities for engineering professionals.
Role Description The VLSI Design Verification Engineer is a full-time, on-site role based at Sasi Institute of Technology & Engineering in Andhra Pradesh, India. This role involves developing verification plans, creating test benches, and executing simulations to verify complex digital designs at the RTL level. The engineer will perform functional verification, analyze results, identify issues, and drive debugging activities in collaboration with design teams. Daily responsibilities include working with formal verification methodologies, documenting verification results, and contributing to continuous improvement of verification processes and tools. The role also includes mentoring students or junior engineers, participating in technical reviews, and supporting VLSI-related academic and research initiatives within the institute.
Qualifications
- Candidates should possess strong skills in RTL Design and Computer Architecture for understanding and modeling digital hardware systems.
- Candidates should possess expertise in Functional Verification and Debugging to validate design correctness and resolve design and implementation issues.
- Candidates should possess knowledge of Formal Verification techniques to complement simulation-based verification and ensure design reliability.
- Candidates should possess proficiency with industry-standard HDLs (such as Verilog/SystemVerilog), simulation tools, and version control systems.
- Candidates should possess a bachelor’s or master’s degree in Electronics, Communication Engineering, VLSI, or a closely related discipline.
- Candidates should possess strong analytical, problem-solving, and communication skills, and the ability to work collaboratively in cross-functional teams.
- Experience with verification methodologies (such as UVM), scripting languages (such as Python or Shell), and exposure to ASIC/FPGA flows is beneficial.
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