Senior Design Verification Engineer (Space)
Viasat
- Salary
- $132k - $209k
- Experience
- 5+ yrs
- Location
- Tempe, Arizona, United States
- Job type
- Full-time
Required skills
- SystemVerilog
- UVM
- Questa
- Xcelium
- VCS
- Jira
- VHDL
- Verilog
About the role
Bachelor's degree in electrical or computer engineering; 5+ years design verification experience with UVM; US citizenship; experience with Questa, Xcelium, VCS; strong communication; ability to travel up to 10%.
About Viasat
Global communications company providing satellite connectivity and defense solutions.
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