UST
Website:
ust.com
Job details:
Role Description
- 8+ years experience on Intel/Altera FPGAs (Agilex, Stratix 10, Arria 10)
- Architecting FPGA systems with PCIe Gen4/Gen5 Hard IP
- Expertise in Quartus Prime Pro, Platform Designer, timing closure, transceiver configuration
- Experience with NVMe/PCIe protocols, DMA engines, and high speed digital design
- Ownership of system architecture, FPGA design reviews, floorplanning, and integration
- Guide team on RTL quality, CDC, SDC constraints, SignalTap debug, and performance optimization
Skills
vlsi design,fpga,quartus prime pro,platform designer,dma engines,
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