SEMIFIVE
Website:
semifive.com
Job details:
Sr. DFT Engineer
About Semifive
Founded in Seoul in 2019, SEMIFIVE is basing its foundation on Korea’s semiconductor design competency that was amassed for more than 20 years. With expertise spanning front-end to back-end design, SEMIFIVE has become the fastest growing silicon design company that offers the most comprehensive design solutions. SEMIFIVE’s core business is its innovative SoC Platform that enables low-cost and high-efficiency SoC design and also provides full turnkey silicon design services for global customers.
As the cost of developing an SoC and the demand for customized silicon continue to grow rapidly, SEMIFIVE’s SoC Platform plays a critical role in turning innovative ideas into silicon. SEMIFIVE works closely with global technology leaders and is rapidly emerging as The New Global Hub of Custom Silicon.
Semifive India Design Centre, headquartered in Bangalore, is a rapidly growing capability centre responsible for delivering complex, multi-node custom SoC programs for global customers across the US, Europe, and Asia. The India team owns end-to-end SoC execution, including RTL, DFT, physical design, and signoff for turnkey silicon programs.
Key responsibilities:
- Responsible for Implementing and integrating scan insertion, scan compression, MBIST, OCC and boundary scan at gate/RTL level.
- Perform gate-level verification and debug DFT/scan issues.
- Root cause low coverage issues and fix to achieve targeted coverage.
- Work on defining DFT architecture/micro architecture to meet the DFT requirements of test time, coverage and yield goals.
- Work with the design and backend teams to enable the integration and validation of the DFT logic.
- Develop and improve DFT methodologies for next-generation designs.
- Post silicon support to ensure successful silicon bring up.
Preferred qualifications:
- Bachelor’s or Master’s degree in Electrical/Electronics engineering with 2-8 years of experience in Scan insertion, ATPG pattern generation/verification, MBIST and boundary scan.
- Strong fundamentals in hierarchical DFT and SDC constraints.
- Good understanding of RTL design, synthesis, STA, and physical design flows.
- Good understanding of SpyGlass DFT rules for DFT quality.
- Basic understanding of JTAG protocols like (IEEE 1149.1).
- Experience in a scripting language such as Perl, Python is a must.
Why Join Us?
At Semifive, the DFT engineer plays a critical role in delivering robust, testable, and manufacturable silicon. Unlike traditional semiconductor companies where DFT roles can be narrowly scoped, Semifive offers broad ownership and deep influence across architecture, implementation, and silicon bring-up.
You will work on multiple advanced custom SoCs, collaborate with global teams and customers, and help define DFT excellence and methodology for a rapidly scaling organization.
This role offers the opportunity to shape how custom SoCs are tested and brought to volume production at Semifive — with real impact on silicon quality and customer success.
Click on Apply to know more.