Sr. ASIC Design Engineer (Silicon Engineering)
SpaceX
- Experience
- 5+ yrs
- Location
- Austin or Irvine or Palo Alto or Redmond
- Job type
- Full-time
Required skills
- Verilog
- System Verilog
- Python
- HDL simulators
- HDL Lint tools
About the role
Bachelor's degree in electrical engineering, computer engineering, or computer science; 5+ years RTL implementation experience; ability to work extended hours or weekends; must be a U.S. citizen, permanent resident, refugee, or asylee for ITAR compliance.
About SpaceX
Designing, manufacturing, and launching advanced rockets and spacecraft.
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