Memory Layout:
- Foundry Node 2nm, 3nm, 4nm [Lower node exp is preferred]
- Experience Band 3-8 yrs with strong Layout concepts.
- TSMC and Samsung foundry experience is must.
Brief JD for Analog Layout:
4–8 years of experience in Analog, Mixed-Signal, and I/O Layout with exposure to advanced TSMC and Samsung technology nodes (2nm/3nm/5nm)
Good consistent hands on working with SerDes, TX,RX, LDO,BGR,OPAMP,ADC,PLL etc., IO layouts HSIO, GPIO, DDRIO etc. and custom layout tools & flows. Mix or exclusive as well good.
Brief JD for IO layout:
4–8 years of experience in Analog, Mixed-Signal, and I/O Layout with exposure to advanced TSMC and Samsung technology nodes (2nm/3nm/5nm)
Good consistent hands on working with IO layouts HSIO, GPIO, DDRIO etc. and custom layout tools & flows.
