Senior Design Verification Engineer
SiFive
- Experience
- 5+ yrs
- Location
- Hyderabad, Telangana, India
- Job type
- Full-time
Required skills
- SystemVerilog
- UVM
- SVA
- VCS
- Xcelium
- Questa
- Verdi
- DVE
About the role
BS/MS in a relevant field, typically 5–10 years of ASIC/SoC/IP verification experience, and direct experience with OoO or superscalar CPU cores. Requires SystemVerilog, UVM, coverage-driven verification, SVA, simulators, and debug tools.
About SiFive
SiFive is a private RISC-V processor-IP company licensing proprietary cores and technology to chip and system developers.
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