LeadSoc Technologies Pvt Ltd
Website:
leadsoc.com
Job details:
Senior Staff Engineer – IP/SoC Verification
Role Overview
We are looking for a Senior Staff Engineer – IP/SoC Verification with deep expertise in SystemVerilog, UVM, testbench architecture, and high-speed protocol verification. The ideal candidate will drive verification strategy, develop scalable verification environments, and lead functional verification of complex IPs and SoCs.
Key Responsibilities
- Own IP/SoC verification strategy, planning, execution, and signoff.
- Architect and develop scalable SystemVerilog/UVM testbenches.
- Drive testbench development, including UVM agents, drivers, monitors, scoreboards, and reference models.
- Verify high-speed protocols such as PCIe, CXL, Ethernet, DDR, and USB.
- Develop comprehensive test plans, functional coverage, assertions, and constrained-random tests.
- Lead block, subsystem, and SoC-level verification, including integration and end-to-end validation.
- Debug complex RTL, protocol, and system-level issues using simulation and waveform analysis.
- Drive coverage closure, regression management, and verification signoff.
- Collaborate with RTL Design, Architecture, Emulation, Firmware, and Post-Silicon teams.
- Mentor engineers and contribute to verification methodology and automation improvements.
Core Technical Skills
- 12–16 years of hands-on IP/SoC Design Verification experience.
- Strong expertise in SystemVerilog and UVM.
- Proven experience in testbench architecture and development from scratch.
- Deep understanding of high-speed protocols and interface verification.
- Strong knowledge of functional coverage, assertions (SVA), constrained-random verification, and coverage closure.
- Experience with UVM methodology, reusable verification components, and regression infrastructure.
- Strong debugging skills in complex IP and SoC environments.
- Proficiency in scripting languages such as Python, Perl, or Tcl.
Preferred Qualifications
- Experience with PCIe Gen4/5/6, CXL, DDR4/DDR5, LPDDR, Ethernet, or USB.
- Exposure to SoC integration, coherency, memory subsystems, or high-performance compute designs.
- Experience with formal verification, emulation, or hardware acceleration.
- Strong technical leadership, architectural ownership, and cross-functional collaboration.
Education
B.E./B.Tech/M.E./M.Tech in Electronics, Electrical Engineering, VLSI, or a related discipline.
Click on Apply to know more.
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