HCLTech
Website:
hcltech.com
Job details:
Job Summary:
We are seeking an experienced Senior Physical Design Engineer with over 4.6+ years of expertise in VLSI chip design and implementation. The ideal candidate will have a strong background in RTL-to-GDSII flow, SOC/block-level physical design, and tapeout experience in advanced technology nodes (7nm, 5nm, or below). This role involves leading physical design projects, mentoring junior engineers, and collaborating closely with cross-functional teams including RTL design, DFT, timing, and packaging teams.
In the semiconductor and VLSI (Very Large Scale Integration) industry, PNR, STA, and VCLP are core components of the Physical Design Engineer or Back-end Design job description. These roles focus on transforming a logical design (netlist) into a physical layout ready for manufacturing.
PNR (Place and Route):
- Definition: The process of placing electronic components (macros and standard cells) and defining the wiring (routing) between them.
- Responsibilities: Includes floorplanning, power planning, clock tree synthesis (CTS), and routing to meet Performance, Power, and Area (PPA) targets.
- Common Tools: Synopsys Fusion Compiler, Cadence Innovus, and ICC2.
STA (Static Timing Analysis):
- Definition: A method of validating the timing performance of a design by checking all possible paths for timing violations without simulating the full circuit.
- Responsibilities: Identifying and fixing setup and hold time violations to ensure the chip runs at its target frequency.
- Common Tools: Synopsys PrimeTime and Cadence Tempus.
VCLP (Voltage-aware Check for Low Power):
- Definition: A signoff check used to verify the integrity of low-power designs, specifically those using Unified Power Format (UPF).
- Responsibilities: Checking for electrical rule violations related to multiple power domains, such as missing isolation cells or level shifters.
- Common Tool: Synopsys VC LP.
Typical Requirements
- Scripting: Proficiency in Tcl, Perl, or Python for automating design flows.
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