Senior Design Verification Engineer

Digicomm Semiconductor

Website: digicommsemi.com
Job details:

Company Description

Digicomm Semiconductor Pvt. Ltd., founded in 2012, is a dynamic provider of semiconductor solutions. The company specializes in accelerating System on Chip (SoC) development cycles through professional technical services tailored to the needs of semiconductor vendors. With expertise in physical design, STA, layout design, and front-end development, Digicomm assists clients in bringing products to market quickly. Leveraging a deep understanding of the semiconductor industry, emerging technologies, and mature development processes, Digicomm delivers innovative solutions to help customers succeed. Additionally, Digicomm's educational division develops advanced electronics and communications training kits used by engineering students across India.

Job Title: Design Verification Engineer

Location: Hyderabad / Chennai

Job Summary:

We are looking for a Design Verification Engineer to verify digital and SoC designs by developing test environments, creating test cases, and ensuring RTL functionality through simulation and coverage analysis.

Key Responsibilities:

• Develop verification plans based on design specifications
• Build testbenches using SystemVerilog and UVM
• Create directed and constrained-random test cases
• Perform functional, code, and assertion coverage analysis
• Debug simulation failures and collaborate with design teams
• Run regressions and maintain verification environments

Required Skills:

• Strong knowledge of digital design fundamentals
• Experience with SystemVerilog / Verilog
• Familiarity with UVM methodology
• Understanding of ASIC/SoC verification flow
• Basic scripting knowledge (Python / Perl / Shell) is a plus

Tools:

Experience with simulators such as Synopsys VCS, Cadence Xcelium, or Siemens QuestaSim is preferred.

Interested one can share resume charu.mourya@digicomm.org

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