Iravan
Website:
iravan.tech
Job details:
Designation -RTL / Emulation & Virtual Platform Correlation Engineer
Experience Level: 7–12+ Years
Location: Bangalore / Hyderabad (Hybrid)
Position SummaryEstablish the bridge between the Virtual Platform, RTL, and hardware emulation, ensuring functional and performance correlation as the company’s designs mature toward silicon.
Key Responsibilities• RTL / VP / Emulation Correlation: Correlate SystemC/TLM models against RTL; validate registers, interfaces, and functional behavior; identify and debug mismatches between VP and RTL; support RTL integration into emulation/prototyping environments; develop correlation tests and benchmarks; support performance comparison between the virtual platform and RTL/emulation.
• Automated Regression & Performance Infrastructure: Develop automated VP/RTL regression flows; create functional and performance regression tests; automate comparison of VP and RTL results; support CI-based model validation.
Required Technical Skills• 7–12+ years of semiconductor verification/emulation experience.
• SystemVerilog/Verilog.
• RTL verification.
• C++ / SystemC/TLM.
• Emulation/prototyping.
• Python.
• SoC architecture.
• Debugging and hardware/software correlation.
Preferred Skills• Synopsys ZeBu, Cadence Palladium, or Siemens Veloce.
• UCIe / PCIe / CXL.
• Chiplet architecture.
• Synopsys Virtualizer.
Education• B.E. / B.Tech / M.E. / M.Tech in Electronics, Electrical, Computer Engineering, or related discipline.
Project Experience• Hands-on VP-to-RTL or RTL-to-emulation correlation work, including debugging functional or performance mismatches.
Soft Skills• Rigorous, detail-oriented debugging mindset across abstraction levels (TLM, RTL, emulation).
• Strong collaboration with the platform architecture and verification teams to resolve correlation gaps.
Good to Have• Hands-on experience with more than one emulation platform (ZeBu, Palladium, Veloce).
• Experience building CI-based VP/RTL regression infrastructure.
Expected Deliverables• VP-to-RTL correlation methodology, tests, and benchmarks.
• Automated VP/RTL regression flows with CI-based model validation.
• Documented functional/performance mismatches and resolutions between VP, RTL, and emulation.
Interested candidates may share resumes at careers@iravan.tech(Immediate to 30-day notice period candidates preferred).
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