Senior Principal Design Verification Engineer
Renesas Electronics
- Experience
- 12+ yrs
- Location
- Plano, Texas, United States
- Job type
- Full-time
Required skills
- Real Number Model (RNM)
- AMS (Analog Mixed Signal)
- Gate-Level Simulation (GLS)
- RTL
- Spectre
- Xcelium
- Verilog
- SystemVerilog
- SPICE
- UVM
About the role
MS or PhD in electrical or computer engineering preferred, 12+ years of mixed-signal or analog verification experience, and expertise with PMICs, RTL, GLS, UVM, assertions, and coverage.
About Renesas Electronics
Global provider of embedded semiconductor and system solutions.
This page is fully interactive when JavaScript is enabled. Please enable JavaScript to apply or browse related roles.
