DDR PHY Senior Lead Digital Design Engineer
Qualcomm
- Experience
- 5+ yrs
- Location
- Bengaluru, Karnataka, India
- Job type
- Full-time
Required skills
- Verilog
- SystemVerilog
- UPF
- EDA tools
About the role
Bachelor's in Science/Engineering with 3+ years ASIC design experience, or Master's with 2+ years, or PhD with 1+ year; 5+ years digital design and front-end implementation; Verilog/SystemVerilog; EDA tools; DDR/LPDDR PHY experience preferred.
About Qualcomm
Global leader in wireless technology, semiconductor design, and intelligent computing.
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