Faststream Technologies
Website:
faststreamtech.com
Job details:
Faststream is hiring a Seasoned STA Engineer. Here are some details on what is expected.
Responsibilities:
- Lead timing closure for sub-system/partition or full-chip level designs
- Collaborate with RTL, DFT, and IP teams to drive iterative timing feedback and closure
- Deliver timing collateral and signoff reports per project milestones
- Perform timing correlation between PD tools and signoff tools; support early feasibility studies
- Generate and push down ECOs to block-level teams
- Mentor junior engineers and provide technical leadership across teams
- Develop automation scripts in Perl, Python, and TCL to improve timing workflows
- Manage timing constraints compatible with synthesis, P&R, and STA tools
Qualifications:
- Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 8+ years of related professional experience
- Proven success in timing analysis and closure across multiple ASICs/SoCs
- Experience with advanced timing concepts: SI, CDC, LVF, POCV, etc.
- Proficiency in STA tools (e.g., Synopsys PrimeTime), scripting, and UNIX environments
- Strong communication skills and ability to work independently and collaboratively
- Experience leading timing closure efforts across teams preferred
- Familiarity with timing methodology and flow development preferred
Click on Apply to know more.