NXP Semiconductors
Website:
nxp.com
Job details:
Role Description
This is a full-time on-site role located in Noida /Bangalore for a Sr.Principal / Principal/ Lead Design Verification Engineer. The Engineer will be responsible for leading and executing formal and functional verification tasks, RTL design, and debugging activities with expertise in RTL and Gate-Level Simulation (GLS) for SDVs, Automotive Zonal Controllers and futuristic AI on Edge devices . The engineer will work closely with other design and verification teams to ensure the quality , functionality and performance of the SoC .The ideal candidate will have a strong background in pre-silicon and post-silicon debugs, ensuring high-quality and functionally safe designs for next-generation automotive and industrial applications.
Key Responsibilities:
• Develop and execute verification plans for SDVs, automotive zonal controllers and edge devices.
• Perform RTL and GLS verification, including debugging timing-related issues.
• Create and enhance UVM-based testbenches for scalable and reusable verification.
• Work closely with design, system, and firmware teams to validate system-level functionality.
• Ensure compliance with automotive safety standards (ISO 26262) and low-power verification methodologies.
Requirements:
• 6-15 years of experience in ASIC/FPGA verification.
• Expertise in UVM, SystemVerilog, and constrained random verification.
• Strong understanding of RTL design, synthesis, STA, and GLS debugging.
• Experience with automotive SoCs, communication protocols (CAN, LIN, Ethernet, PCIe), and functional safety (ISO 26262, ASIL levels).
• Hands-on experience with power-aware verification and mixed-signal verification is a plus.
Join us to shape the future of automotive connectivity and edge intelligence! If interested send your resumes to amitav.halder@nxp.com
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