Senior Formal Verification Engineer
Microsoft
- Experience
- 7+ yrs
- Location
- Bengaluru, Karnataka, India
- Job type
- Full-time
Required skills
- SystemVerilog
- SystemVerilog Assertions (SVA)
- Cadence JasperGold
- Synopsys VC Formal
About the role
Bachelor's or master's degree in a relevant field and 7+ years of semiconductor formal verification experience, with expertise in SystemVerilog, SVA, digital design, and SoC architecture.
About Microsoft
Develops software, services, devices, and cloud computing solutions.
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