Formal Verification Engineer II
Microsoft
- Experience
- 4+ yrs
- Location
- Bengaluru, Karnataka, India
- Job type
- Full-time
Required skills
- SystemVerilog
- SystemVerilog Assertions (SVA)
- Cadence JasperGold
- Synopsys VC Formal
About the role
Bachelor's or master's degree in a relevant field and 4+ years of semiconductor formal verification experience. Requires SystemVerilog, SVA, digital design, computer architecture, and formal tool expertise.
About Microsoft
Multinational technology corporation providing software, cloud, and AI solutions.
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