Design Verification Engineer - Compute
MatX
- Salary
- $160k - $600k
- Experience
- 5+ yrs
- Location
- Mountain View, California, United States
- Job type
- Full-time
Required skills
- SystemVerilog
- UVM
- Python
- C
- C++
- Rust
- Haskell
- Bluespec
About the role
Requires 5+ years of silicon design-verification experience, concept-to-tapeout experience, SystemVerilog/UVM, ABV, formal and simulation verification, Python, C/C++, and high-performance compute architecture knowledge.
About MatX
AI semiconductor company designing high-throughput chips for large language models and frontier AI labs.
This page is fully interactive when JavaScript is enabled. Please enable JavaScript to apply or browse related roles.