ASIC & FPGA Verification Engineer Sr Stf - E5
Lockheed Martin
- Salary
- $185k - $344k
- Location
- Denver or Sunnyvale
- Job type
- Full-time
Required skills
- SystemVerilog
- Universal Verification Methodology (UVM)
- Linux
- VHDL
- Verilog
- Perl
- TCL
- Python
- Microsoft Project
- JIRA
- Earned Value Management System (EVMS)
About the role
Bachelor's degree in electrical engineering or related field, FPGA/ASIC verification experience, HDL programming with VHDL, Verilog, or SystemVerilog, and eligibility for a DoD Secret clearance with US citizenship.
About Lockheed Martin
Global security and aerospace company driving innovative defense solutions.
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