Senior Static Timing Analysis (STA) Engineer
Job Summary
LeadIC Design Pvt. Ltd. is seeking a highly skilled Senior Static Timing Analysis (STA) Engineer with 5+ years of experience in ASIC timing analysis and signoff. The ideal candidate should have strong expertise in timing closure, MCMM analysis, SDC constraints, and signoff methodologies using industry-standard EDA tools. This role offers the opportunity to work on advanced semiconductor technologies and collaborate with global engineering teams.
Key Responsibilities
Perform full-chip Static Timing Analysis (STA) and timing signoff for complex ASIC/SoC designs.
Analyze and resolve setup, hold, recovery, and removal timing violations.
Execute Multi-Mode Multi-Corner (MCMM) timing analysis across multiple PVT corners.
Develop, validate, and debug SDC timing constraints.
Collaborate closely with RTL, Physical Design, DFT, and Verification teams to achieve timing closure.
Analyze timing reports and implement optimization strategies to meet performance, power, and area (PPA) targets.
Support ECO implementation and timing validation throughout the design cycle.
Develop and maintain automation scripts using TCL, Python, or Perl to improve STA workflows.
Participate in design reviews and support final signoff activities.
Required Skills
5+ years of hands-on experience in ASIC Static Timing Analysis.
Strong expertise in Synopsys PrimeTime (Mandatory).
Good understanding of MCMM timing analysis and signoff methodologies.
Experience with SDC constraints, timing exceptions, and ECO flows.
Strong knowledge of setup/hold analysis, clocking architecture, and timing optimization.
Proficiency in TCL scripting; Python or Perl is an added advantage.
Familiarity with Cadence Tempus, Physical Design flows, and Cadence Innovus is preferred.
Experience working on advanced technology nodes (16nm, 7nm, 5nm, or below) is highly desirable.
Excellent analytical, debugging, and communication skills.
Qualifications
Bachelor's or Master's degree in Electronics, Electrical Engineering, VLSI, or a related field.
Ability to work effectively in cross-functional teams and deliver high-quality results in a fast-paced environment.
Why Join LeadIC?
Work on cutting-edge ASIC and SoC projects.
Exposure to advanced semiconductor technology nodes.
Collaborate with global semiconductor customers.
Competitive compensation and excellent career growth opportunities.
Hybrid work environment with a strong engineering culture focused on innovation and continuous learning.