ROLE: Senior Technical Lead – GPU/SoC Verification
9 to 15 years of experience to drive the verification strategy for next-gen SoC and NVIDIA GPU integrated architectures.
Domain : Proven track record of verifying complex SoCs and GPU sub-systems (specifically experience interfacing with or verifying NVIDIA GPU architectures is highly preferred).
Skills : Expertise in SystemVerilog (SV) and UVM architecture, including building testbenches from scratch.
Protocols & IPs : Deep understanding of high-speed interconnects, memory controllers (e.g., DDR, HBM), and standard bus protocols (e.g., AXI, ACE, CHI ).
Coverage & Sign-off : Expert-level knowledge in defining functional coverage metrics, writing assertions, and debugging code coverage gaps.
Tools : Synopsys VCS, Cadence Xcelium, or Siemens Questa and debuggers like Verdi.