Website:
opsilin.com
Job details:
🚀 Lead Verification Engineer – PCS/FEC & SERDES
Overview
We are hiring a Lead Verification Engineer for PCS, FEC, and SERDES IPs.
Key Responsibilities
● Lead verification for PCS/FEC & SERDES IPs
● Define verification strategy and drive UVM-based environments
● Execute block, subsystem, and SoC-level verification
● Debug issues, ensure coverage closure, and improve quality
● Mentor team members and collaborate with cross-functional teams
Requirements
● Bachelor’s / Master’s / PhD in relevant field
● 8+ years in functional verification
● Strong SystemVerilog & UVM expertise
● Experience in high-speed interfaces (SERDES/PCS/FEC)
● Scripting: Python/Perl/Bash/TCL
● Familiarity with simulation tools & version control (Git/SVN)
● Experience in formal/dynamic verification
● Good communication skills
● Experience leading verification teams
What We Offer
✨ Top-tier pay in India
🔒 Long-term, stable project
🌍 Remote-friendly role
✈️ Visa sponsorship available for candidates interested in relocating to Europe
📩 If this aligns with your experience, feel free to reach out or apply!
Click on Apply to know more.