Develop and execute verification plans for Analog and Mixed-Signal (AMS) blocks and SoCs.
Build and maintain testbenches using SystemVerilog, Verilog-AMS, and/or UVM-AMS.
Perform functional, behavioral, and connectivity verification across analog-digital interfaces.
Debug simulation issues and work closely with design teams to resolve functional gaps.
Support coverage closure and contribute to AMS sign-off for tape-out readiness.