Texas Instruments
Website:
ti.com
Job details:
⚡ Verify the Future of Intelligence — From Silicon to System
At Texas Instruments, our engineers don't just design chips — they ensure every line of RTL is functionally correct, verified, and ready to power the world's most demanding applications. If you're a verification expert who thrives on UVM methodology, SoC integration, and driving verification closure, this is your opportunity.
🔎 About the Role
We are looking for a talented IP Design Verification Engineer – UVM | SoC | Embedded Processors to join our Processors and Application Specific Microcontroller (ASM) Business Unit — part of TI's Embedded Processors group.
You will own the full DV lifecycle — from verification strategy and test plan creation to UVM testbench development, coverage closure, and SoC integration debug — for cutting-edge SoCs spanning 5nm technologies targeting automotive ADAS, zonal controllers, domain controllers, and industrial real-time control applications.
This is a high-ownership, high-impact role where your verification work directly ensures the functional correctness of TI's most advanced embedded processor designs.
📌 Key Responsibilities
- Drive verification strategy and create comprehensive test plans for IP blocks and sub-systems
- Develop and enhance UVM and C-based testbenches and verification infrastructure
- Develop testcases for IP performance/throughput measurement and stress testing
- Triage regressions, debug simulations, and analyze coverage metrics
- Work with cross-functional teams to achieve full verification closure
- Participate in IP/sub-system specification activities and influence micro-architecture decisions
- Design and execute reusable verification methodologies
- Debug and resolve SoC integration issues in collaboration with SoC DV teams
- Achieve DV signoff using SV & UVM constrained random methodology:
- Develop UVM components: agents, drivers, monitors, and scoreboards
- Define and meet all functional coverage goals
- Achieve 100% code coverage (block, expression, toggle) at IP DV level
- Leverage AI-assisted verification tools for faster closure and signoff
🛠️ Minimum Requirements
- Bachelor's/Master's degree in Electrical Engineering, Electronics, or related field
- 2–5 years of experience in IP DV, sub-system, or SoC DV
- Proficiency in C, C++, SystemVerilog, SV Assertions, and scripting (Make, Perl, Python)
- Strong knowledge of UVM and C-DPI methodology
- Solid understanding of standard bus/interface protocols: AHB, APB, AXI
- Experience with ARM Cortex M0/M33 or RISC-V based subsystems
- Exposure to security hardware, cryptographic accelerators, and DMA
- Knowledge of SoC architecture
- Excellent debugging and problem-solving skills
🌟 Preferred Qualifications
- Experience with Cadence simulation tools (Xcelium, Incisive, etc.)
- Familiarity with formal verification techniques
- Experience with JIRA-based project management
- Strong verbal and written communication skills
- Ability to collaborate effectively across architecture, design, and applications teams
- Self-starter with the ability to own DV tasks end-to-end and deliver high-quality results
💡 Why Texas Instruments?
🌱 Growth: Work on 5nm SoCs powering ADAS, autonomous driving & industrial real-time control
🏆 Impact: Your DV work ensures functional correctness of chips powering millions of devices
🤝 Culture: Collaborative, inclusive & innovation-driven engineering culture
💰 Compensation: Competitive salary, comprehensive benefits & long-term incentives
📚 Learning :Access to world-class EDA tools, AI-assisted verification & cutting-edge SoC architecture
🔬 Innovation :Work alongside top DV, design, and architecture engineers in the industry
📣 Ready to Drive Verification Excellence?
If you are passionate about functional verification, SoC design quality, and working on technology that powers the future of automotive and industrial intelligence — we want to hear from you!
Apply now
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