- Experience
- 15+ yrs
- Location
- Bengaluru, Karnataka, India
- Job type
- Full-time
Required skills
- Verilog
- Synopsys Design Compiler
- Verplex LEC
- Spyglass
About the role
MSEE or BSEE required with 15+ years experience; strong Verilog RTL coding; knowledge of Synopsys Design Compiler, Verplex LEC, Spyglass desirable; experience with networking ASICs a plus; strong problem-solving and communication skills.
About Hewlett Packard Enterprise
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