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Job details:
Location: Remote - Pune / Bangalore, India
Job Type: Executive / Founding Team (Pre-Seed Structure)
Company Overview Imperative Labs is a deep-tech semiconductor startup developing India’s first server-grade Photonic Neural Processing Unit (NPU). We are redefining the limits of AI compute bandwidth and thermal efficiency. We are currently finalizing our core four-person founding engineering team to drive the pre-silicon architecture, complete the tape-out process, and scale through our upcoming institutional seed round.
Role Objective We are seeking a Head of Compilers & Systems Architecture to lead our software and systems engineering vertical. This executive will be responsible for building the foundational software infrastructure that bridges high-level machine learning frameworks (e.g., PyTorch) with our low-level analog optical matrix hardware, ensuring seamless hardware-software co-design.
Key Responsibilities
- Pre-Silicon Simulation: Design, implement, and optimize a bit-accurate software execution simulator in C++/Python to mathematically model the photonic compute matrix and validate system performance.
- Compiler Pipeline Architecture: Architect the AI compiler stack utilizing intermediate representation frameworks (MLIR, LLVM, or Triton) to translate computational graphs into hardware-level instructions.
- ISA Definition: Collaborate directly with the Analog IC and Photonic Design leads to define the Instruction Set Architecture (ISA), memory mapping, and control-loop logic for the optical chip.
- Systems Integration: Lay the groundwork for post-silicon software bring-up, including future Linux driver development and PCIe interface communications.
Qualifications & Expertise
- Ph.D., M.Tech, or B.Tech in Computer Science, Computer Engineering, or a closely related discipline (alumni of IITs, IISc, or equivalent premier institutions preferred).
- Extensive proficiency in modern C++ and low-level systems programming.
- Strong foundational knowledge of Advanced Computer Architecture (memory hierarchies, registers, bandwidth allocation, and hardware accelerators).
- Demonstrated experience in compiler infrastructure (LLVM, MLIR), parallel computing (CUDA, HPC), or hardware-software co-design is highly preferred.
Employment Terms & Compensation Structure This is a founding executive position structured around our pre-seed funding roadmap:
- Pre-Funding Phase: Part-time commitment of 12–15 hours/week (Remote). This phase is strictly equity-aligned, requiring zero cash compensation prior to the close of the institutional funding round.
- Post-Funding Phase: Upon the successful closing of our institutional seed round, this role will automatically transition into a full-time commitment under the following terms:
- Base Remuneration: ₹24,00,000 LPA (₹2,00,000 per month).
- Equity Allocation: 0.50% Founding Equity (Standard 4-year vesting schedule with a 1-year cliff).
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