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ASIC DFT Engineer

Min Experience

2 years

Location

Bengaluru, Karnataka, India

JobType

full-time

About the job

Info This job is sourced from a job board

About the role

Minimum qualifications:

  • Bachelor's degree in Electrical or Electronics Engineering, or equivalent practical experience.
  • 2 years of experience in DFT methodologies.
  • Experience with DFT Electronic Design Automation (EDA) tools like Tessent.
  • Experience with Automatic Test Pattern Generation (ATPG), Low Power designs, Built-In Self Test (BIST), Joint Test Action Group (JTAG), Internal Joint Test Action Group (IJTAG) tools and flow.

Preferred qualifications:

  • Experience working with DFT scan insertion, ATPG and Gate level simulations.
  • Experience with a scripting language such as Perl or Python.
  • Knowledge on IJTAG, Streaming Scan Network (SSN).

About The Job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.

Responsibilities

  • Work with a team of Design for Testing (DFT) engineers, Register-Transfer Level (RTL) and physical designer engineers
  • Work on subsystem level DFT scan insertion, ATPG, no timing and timing Gate Level Simulation (GLS).
  • Work with executive members of the DFT team to deliver overall deliverables for subsystems in a System on a Chip (SoC).


Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

About the company

Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful.

Skills

DFT
ATPG
Low Power designs
BIST
JTAG
IJTAG
Perl
Python