ASIC Design Engineer Silicon

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• Experience with digital design in ASIC.
• Experience with RTL design using Verilog/System Verilog and microarchitecture.
• Experience with ARM-based SoCs, interconnects and ASIC methodology.
• Experience with a scripting language like Python or Perl.
  
  

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 2 years of industry experience with IP design.
• Experience with methodologies for low power estimation, timing closure, synthesis.
• Experience with methodologies for RTL quality checks (e.g., Lint, CDC, RDC).
  
  

About The Job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

• Define microarchitecture details such as interface protocol, block diagram, data flow, pipelines, etc.
• Perform RTL development (SystemVerilog), debug functional/performance simulations.
• Perform Register-Transfer Level (RTL) quality checks including Lint, Clock Domain Crossing (CDC), Synthesis, Unified Power Format (UPF) checks.
• Participate in synthesis, timing/power estimation and Field Programmable Gate Array (FPGA)/silicon bring-up.
  
  
  

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements.