Website:
neo-tech.co.in
Job details:
We are looking for an 10 yrs experienced Digital Verification Engineer with strong expertise in SystemVerilog and UVM. The ideal candidate should have solid understanding of digital logic, RTL design, FSMs, pipelines, and bus architectures, along with hands-on experience with verification simulators such as VCS, Questa, or Xcelium. Experience with coverage-driven verification, debugging tools like Verdi/SimVision/DVE, and verification of interfaces such as AXI, AHB, DDR, and PCIe is required. Candidates should also be familiar with version control and regression systems like Git and Jenkins and possess strong debugging and problem-solving skills.
📩 Interested candidates can reach out or share their profiles to HR@neo-tech.co.in
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