ACL Digital
Website:
acldigital.com
Job details:
should have at least 2+ years of experience in DFT domain
Should be aware of IC level DFT architecture
Should have experience with JTAG, scan insertion, compression, ATPG, boundary scan.
Should have experience with timing & notiming simulations.
Should have experience with memory bist (RAM & ROM).
Should be able to work independently and be a team player
Should have good communication(written and verbal) skills.
Experience with Memory BIST is must.
Post silicon debug experience is a plus
Experience with Verilog/VHDL, Synthesis, STA, LEC a plus
Experience with Ultra Low Power Designs , Conformal Low power is a plus.
Analog DFT experience is a plus.
Click on Apply to know more.