Website:
univisionsys.com
Job details:
🚀 We’re Hiring | Design Verification (DV) Engineer
📍 Location: Bangalore
💼 Experience: 5+ Years
⏳ Notice Period: Immediate to 30 Days
🔍 Key Requirements:
Strong experience in CPU Subsystem Verification
Strong hands-on experience in SystemVerilog (SV)
Strong expertise in UVM
Good understanding of ASIC Design Verification methodologies
Strong debugging and verification skills
📩 Interested candidates can share their updated CV at:
gunashree.k@univisiontechnocon.com
If you or someone in your network is looking for an opportunity, please feel free to reach out.
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