leadIC Design Pvt Ltd
Website:
leadicdesign.com
Job details:
Company Description LeadIC Design Pvt Ltd accelerates semiconductor innovation through full-stack VLSI engineering expertise, supporting the complete chip development lifecycle for global semiconductor companies. Founded in 2018, the company has grown into a trusted partner delivering high-quality design services tailored to product-driven teams. With engineering teams across India and Canada, LeadIC covers key domains including digital design, design verification, physical design, STA, DFT, and FPGA-based prototyping. The organization emphasizes ownership-driven engineering culture, structured and quality-focused execution, and flexible engagement models to match diverse technical and business needs. Long-term relationships with global leaders reflect LeadIC’s reliability and commitment to building technical partnerships that help customers achieve silicon success.
Role Description This is a full-time Design Verification Engineer role (4+ years experience) based in Bengaluru, structured as a hybrid position with a mix of on-site and work-from-home. The engineer will define and develop verification plans, environments, and testbenches for complex digital designs, ensuring coverage-driven and scenario-based functional verification. Day-to-day responsibilities include writing and reviewing RTL and testbench code, creating and executing test cases, analyzing coverage reports, and performing meticulous debugging of simulation failures. The role involves close collaboration with RTL designers, architects, and cross-functional teams to clarify specifications, improve verification quality, and drive signoff criteria. The engineer will contribute to methodology improvements, maintain verification documentation, and support continuous enhancement of verification flows and tools.
Qualifications
- Candidates should possess strong skills in Functional Verification and Formal Verification, including testbench development, coverage analysis, and assertion-based techniques.
- Candidates should possess solid RTL Design and Computer Architecture knowledge, enabling effective interpretation of specifications, micro-architecture, and design intent.
- Candidates should possess advanced Debugging skills for simulation failures, waveform analysis, and root-cause identification in complex SoC or IP-level environments.
- Candidates should possess familiarity with industry-standard verification methodologies and tools (e.g., SystemVerilog, UVM, simulators, formal tools) and basic scripting (Python/Perl/Shell) for automation.
- Candidates should possess a bachelor’s or master’s degree in Electronics, Electrical Engineering, Computer Engineering, or a related discipline, along with 4+ years of relevant design verification experience.
- Candidates should possess strong analytical thinking, clear written and verbal communication, the ability to collaborate in cross-functional teams, and a proactive, ownership-driven work style.
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