Qualcomm
Website:
qualcomm.com
Job details:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.
As a
CPU EM/IR CAD Engineer, you will develop, support, and enhance
power integrity and electromigration analysis tools and methodologies for
high‑performance custom CPU designs. Your work will be critical in ensuring
robust power delivery, long‑term reliability, and silicon correctness for industry‑leading CPUs across advanced technology nodes.
Roles And Responsibilities
- Serve as an expert user of Synopsys RedHawk‑SC and/or Cadence Voltus for EM and power integrity analysis, with exposure to PNR, STA, and extraction tools and flows used in CPU implementation.
- Support and enhance static IR, dynamic IR, and electromigration (EM) flows at block‑level and subsystem‑level CPU designs.
- Provide technical guidance and feedback to CPU PDN and Physical Design teams on EMIR best practices, rules, and CPU‑specific methodologies.
- Troubleshoot and debug CPU‑specific EMIR challenges arising from high current density, frequency scaling, and aggressive PPA targets, and propose effective solutions.
- Develop, support, and enhance automation scripts to post‑process EMIR results, generate dashboards, and summarize actionable insights for CPU design teams.
- Maintain, qualify, and release production‑quality EMIR CAD flows for large, complex CPU and SoC designs.
- Maximize design productivity through strong automation and customization using Python, TCL, and Perl scripting.
- Qualify EMIR tools using regression frameworks, create test suites, and manage flow/tool sign‑off for CPU programs.
- Engage closely with EDA vendors to evaluate new features, resolve tool issues, and drive next‑generation EMIR solutions tailored for CPU workloads.
- Collaborate with global CPU CAD, Physical Design, and EDA partners to deliver scalable, efficient, and cutting‑edge CAD solutions.
Qualifications / Must‑Have Skills
- 5 to 15 years of hands‑on experience in EM/IR, Power Integrity, or CAD methodology, preferably on CPU or high‑performance SoC designs.
- Strong expertise in EM and IR analysis using Synopsys RedHawk‑SC and/or Cadence Voltus.
- Solid understanding of CPU power delivery networks (PDN), EM/IR failure mechanisms, and reliability sign‑off concepts.
- Exposure to CPU Physical Design, STA, and parasitic extraction flows, and their interaction with EMIR analysis.
- Proven experience in CAD flow development, automation, and productivity improvement.
- Strong scripting skills in Python, TCL, and/or Perl.
- Ability to work with global teams and provide methodology leadership for CPU design programs.
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