Job Title: Electrical Engineer Summer Intern
Location: Cerritos, CA (On-Site)
About Corelis
Corelis Inc. is a leader in high-performance JTAG-based tools, bus analysis tools, and embedded test tools for hardware development and automated testing. Corelis offers the industry's broadest line of JTAG/boundary-scan software and hardware products and is an industry leader in the JTAG interface and boundary-scan market. As an industry leader and innovative technology group, we deliver the highest quality boundary-scan products to our customers. Corelis seeks ambitious and self-starting people motivated to do the exceptional, individually and as team players. We offer a challenging and professional environment, attractive compensation, and a very competitive benefits package.
The Summer 2026 internship program will begin approximately June 1 and run for about 10 weeks with an end date of August 31. The intern will work 40 hours per week, Monday through Friday. This is an on-site position.
About the Role
Corelis is looking for a detail-oriented Engineering Intern to lead the expansion and normalization of our Boundary Scan Device Model Library.
While our senior engineers focus on core product logic, you will tackle a high-value initiative: building a comprehensive, queryable catalog of Flash and RAM models. This role is perfect for a student who wants to dive deep into electronic components, memory architectures, and the business of hardware test automation.
What You’ll Do
You will be responsible for three primary tracks aimed at moving our library from "on-demand" to "industry-leading."
- Track 1: Flash Device Model Normalization (Core Project)
- Develop a canonical naming scheme for vendors, families, densities, and packages.
- Expand the Flash library by adding package and density variants for key vendor sets.
- Create a cross-reference matrix (Vendor ↔ Density ↔ Organization ↔ Package ↔ Model File).
- Document the process to ensure sustainable library growth.
- Track 2: RAM Model Expansion
- Apply your Flash framework to our RAM model library.
- Build out standardized naming and variants for memory devices.
- Track 3: Model Validation & Organization
- Audit and inventory existing "transparent" models.
- Implement a Git-based version control method for managing and tagging unverified models.
What You’ll Learn
- Domain Expertise: Master Boundary Scan (JTAG) standards and memory architectures.
- Component Engineering: Become an expert at interpreting complex datasheets and understanding packaging variants.
- Data Architecture: Learn how to organize technical data for high-scale engineering use.
- Professional Workflow: Gain experience with Git version control and documentation standards in a production environment.
Qualifications
- Currently pursuing a B.S. in Electrical Engineering, Computer Engineering, or a related field, preferably at their senior year academically or have concluded their third year.
- Basic understanding of electronic components (Flash, RAM, Logic Gates).
- Strong organizational skills and an "investigative" mindset for technical research.
- Familiarity with Git or other version control systems is a plus.
- Ability to work independently on "additive" projects while maintaining consistency with existing logic.
Why Corelis?
We offer an environment where interns do work that actually reaches customers. You won’t just be shadowing; you’ll be building a library that will be a key differentiator for our sales and engineering teams for years to come.
Corelis is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion or belief, sex, sexual orientation, gender identity, national origin, disability, veteran status or any other legally-protected characteristic.