RTL Design Engineer (76608)
Battelle
- Salary
- $86k - $123k
- Experience
- 3+ yrs
- Location
- Columbus, Ohio, United States
- Job type
- Full-time
Required skills
- Verilog
- SystemVerilog
- Synopsys
- Cadence
- Siemens
- Python
- TCL
- Git
About the role
Bachelor's or Master's in electrical/computer engineering or related field; 3+ years RTL design experience; Verilog/SystemVerilog; synthesis, timing analysis, CDC, DFT; EDA tools; Python/TCL; Git; US citizenship and ability to obtain security clearance.
About Battelle
Independent non-profit applied science and technology research organization.
This page is fully interactive when JavaScript is enabled. Please enable JavaScript to apply or browse related roles.
